Graphics: 360 has the best

ghost23 wrote:

KillzoneKilla wrote:

u guys honestly believe that 360 has better graphics just because of the framerate? cmon u guys are sad, im a 360 owner and you guys are just being very biased towards 360, ive seen my friend playing killzone and that game was said to have low framerate, i didin't see a problem it looked great, framerate doesnt mean shit unless its super low which no next gen game has,

Thats where you're wrong. I would much rather a steady frame rate with good graphics than amazing graphics but a shitty frame rate.

Take ME1 for example, that looked amazing for its time but the frame rate was just like a kick in the balls for me.

lol like when you would turn around the frames would just drop real bad for no reason

SonicandTails wrote:

sorry i took so long and it says the 360 graphics chip is much better then the PS3

The 360 does have a better GPU but let me school you guys a bit. The PS3 was originally designed to do ALL processing including video. The Cell PPE processor is very capable of doing such. They decided to take some of the load off of the GPU and add a 128MB CPU. The PS3 can still use one of the 6 SPUs available for gaming for graphics.

Most multi-platform games are developed on the 360 then ported over to the PS3. Its to bad really its not the other way around. You may ask why but there is a reason. Code has be "cleaner" to run on the PS3 due to its processor design were on the 360 code can be "sloppier". Its a poor choice of words but I saw a video with a Sony rep admitting games would be better for the 360 if they coded it for the PS3 then ported it over to the 360. Thats were Sony messed up they made a console that is hard to code for and developers have admitted the 360 to be easier to code for.

demondragondude wrote:

360fourlife wrote:

SonicandTails wrote:

sorry i took so long and it says the 360 graphics chip is much better then the PS3

The 360 does have a better GPU but let me school you guys a bit. The PS3 was originally designed to do ALL processing including video. The Cell PPE processor is very capable of doing such. They decided to take some of the load off of the GPU and add a 128MB CPU. The PS3 can still use one of the 6 SPUs available for gaming for graphics.

Most multi-platform games are developed on the 360 then ported over to the PS3. Its to bad really its not the other way around. You may ask why but there is a reason. Code has be "cleaner" to run on the PS3 due to its processor design were on the 360 code can be "sloppier". Its a poor choice of words but I saw a video with a Sony rep admitting games would be better for the 360 if they coded it for the PS3 then ported it over to the 360. Thats were Sony messed up they made a console that is hard to code for and developers have admitted the 360 to be easier to code for.

https://www.youtube.com/watch?v=mu7IrcweFLY

Some of that guys info is wrong. One is that despite what people think the Cell has 9 cores. The video the guy said "1 core and 6 active SPE's". Those SPE's are cores too. 8 are only active at a time. One for security overhead, one to coordinate traffic if you will, and the other 6 dedicated to gaming. It was a designed with 9 cores in case one of the efuses got blown for what ever reason or there was a problem with a core coming out of the production line. Its all in the IBM documentation pages that can be found at the IBM site. In reality this processor has caused developers more trouble than its worth imo thats why they code most games for the 360 then port it over to the PS3.

Honestly though guys there isnt a real big difference if at all in the graphics. I'm an owner of both consoles and I have seen great looking games. Gears of War2 for example looks amazing and probably one of my favorite games ever. In fact I cant wait for 3 should be epic awesome sauce. On the flip side Metal Gear Solid 4 looks great also. Have you tried the God of War 3 demo? Holy shit does that game look incredible. I know this is a 360 fan site and the 360 overall may be a better machine at least give credit were credit is due because they are both great systems in their respective rights.

The Cell does not have 9 cores. It has one core and 8 SPUs. Basically its one physical core and 8 virtual cores.

Master_Chief wrote:

The Cell does not have 9 cores. It has one core and 8 SPUs. Basically its one physical core and 8 virtual cores.

TRUE! glad to see someone who knows what their talking about

Obviously Master Chief you were misinformed. And way to jump on the bandwagon Grunt06 because you have zero clue on what you are agreeing to. Here is the majority of the technical specifications of the PS3 system. I will bold the part that shows it has NINE cores. This information came directly from the IBM white pages. If you dont believe me look on the IBM website yourself and prove me wrong.......which I'm not. I dont know why I'm making a big deal about it but at the same time I do. I'm a tech junky, I like to know how things work and I hate we wrong info gets out.

Quote :

DETAILED LOOK AT THE PS3 - Updated 20/04/10

Model Options

* 120GiB CECH-2000A - PS3 Slim (USA Release August 24th, 2009)
> 33% smaller
> 36% lighter
> Redesigned cooling system
> CPU & GPU @ 45nm Process
> 34% less power consumption
> Charcoal Black
> Wifi
> 2 Front USB 2.0
> Ethernet (10BASE-T, 100BASE-TX, 1000BASE-T) × 1, IEEE 802.11 b/g, Bluetooth 2.0 (EDR)
> "Deep Colour" and "x.v.Colour (xvYCC)" as defined by HDMI V1.3a are supported
> Some Options Removed and/or Same As Other Later Models
> No BwC (Of Course)
> No Other O/S Option
> No Card Reader
> Support for BRAVIA Sync

* 250GB CECH-2000B = PS3 Slim (December 2009 - USA)
> 250GB HDD
> Also Available in White and Pink
> All of the 2000A Specs

* 20GiB CECHBxx (USA/JAP ONLY=No PAL Release) (Discontinued April 11, 2007)
> No Card Reader
> No WiFi
> No Chrome Trim
> Hardware Backwards Compatibility
> EE+GS+RAM

* 40GiB CECHGxx, CECHHxx (PAL/NTSC) Oct. 10, 2007 - Japan Nov. 11, 2007 - Oct. 10, 2007 Other Regions
> 65nm CPU
> White Case (Asia Only)
> No Card Reader
> PS1 Backward Compatibility
> No SACD
> Chrome Trim
> WiFi
> Only 2 Front USB Ports

* 60GiB CECHAxx (NTSC) (Discontinued August 6th, 2007 on Price Drop notice - Production was halted)
> Hardware Backwards Compatibility
> EE+GS+RAM
> CECHAxx (PAL) Software Backwards Compatibility
>GS
> All Options

* 80GiB CECHExx - July 9, 2007 (USA ONLY)
> All Options
> Software Backward Compatibility - No PS2 Hardware

* 80GiB CECHKxx - August 2008 (PAL region)
> No Backward Compatibility
> No Multi-Card Reader
> No SACD

* 120GB - June 2008 (Sony Said No UK Release)
> No BwC
> Dual Shock 3 controller

* 160GB CECHPxx - Limited Edition Uncharted Bundle - November 2008
> No NwC
> Game - Uncharted: Drake's Fortune
> DualShock 3 Controller
> No Multi-Card reader
> No SACD

* 120GiB (Kiosk/Demo Units)
> Options as specific as retail units of same MFR date & region.
> Unlock Code required to Access most features.
> Built to freeze up (15-30 minutes) on purpose - so that people won't play it all day long.
> Specifically during Motorstorm.
> Not for user end resale.
> Can get on-line firmware updates, but unlock code changes
> No user-end support from Sony

* ???GiB Debug (TEST) Unit
> No Blu-Ray movie playback
> Runs unfinished code from burned BR-Ds


Region Information

* PS3 Titles = Region Free (reportedly, at developer's disgression)
* PS2 Titles = Region Locked
* PS1 Titles = Region Locked
* DVD Movies = Region Locked
* BR-D Movies
> A/1 North America, Central America, South America, Japan, North Korea, South Korea, Taiwan, Hong Kong and Southeast Asia.
> B/2 Europe, Greenland, French territories, Middle East, Africa, Australia and New Zealand.
> C/3 India, Nepal, Mainland China, Russia, Central and South Asia.


The following internal specifications are very detailed! Most specs taken from FCC documents, Sony, and IBM.

CPU: Cell Broadband Engine - 90nm Process before March 2007 (65nm > March '07)

* PowerPC-base Core @3.2GHz (Prototype ran at 4.66Ghz)
> 64 bit, "Power Architecture" processor
> Dual issue, dual threaded, in-order processor.
> 235 square mm
> 235 million transistors
> Rambus XDR and FlexIO technology allow up to 100 gigabyte/s memory transfer rates.
> 90nm Process CMOS SOI
> 65nm CMOS SOI Process Started March 07
- 6GHz at 1.3V
- Dual power supply; enhances SRAM stability and performance using an elevated array-specific power supply, while reducing the logic power consumption.
> Power consumption has been estimated at 60 - 80 Watts at 4 GHz
* 9 Core CPU
> 1 Power Processor Element (PPE) - Acts as Controller (PowerPC Core)
> The PPE is dual threaded
> RISC architecture
> Fixed-width 32-bit instruction format
> 64-bit general purpose register set (GPR)
> 64-bit floating point register set (FPR)
> 128-bit Altivec register set
> Additional instructions relating to control of the SPEs
> 8 Synergistic Processor Elements (SPEs) with 256KB "Local Stores" per Core
> Can support up to 4 GiB of local store memory
> Each SPE capable of 32 GigaFlops (32 bit)
> RISC architecture
> Fixed-width 32-bit instruction format
> 128-bit, 128 entry register only
> Scalar data types, from 8-bits to 128-bits
> Or SIMD computations on a variety of integer and floating point formats
* 1 VMX vector unit per core
* 512KB L2 cache
* 7 x SPE @3.2GHz
> 1 of 8 SPEs reserved for redundancy
> 6 SPE used for game applications
* 7 x 128b 128 SIMD GPRs
* 7 x 256KB SRAM for SPE
* Element Interconnect Bus (EIB)
> Circular ring comprised of 4 16B-wide unidirectional channels which counter-rotate in pairs
> Each channel can convey up to three transactions concurrently
> Each channel 16B read port and one 16B write port
> Max 12 concurrent transactions * 16 bytes wide / 2 system clocks per transfer
> Runs at half the system clock rate
> Effective channel rate is 16 bytes every two system clocks
* Direct Memory Access Controller (DMAC).
* 2 Rambus XDR memory controllers
* Rambus FlexIO (Input / Output) interface
> Interface is organized into 12 lanes
> Five 8-bit wide point-to-point paths are inbound lanes to Cell
> Seven 8-bit Outbound from Cell
> Each lane unidirectional 8-bit wide point-to-point path
> Peak bandwidth of 62.4 GB/s (36.4 GB/s outbound, 26 GB/s inbound) at 2.6 GHz
> Can be clocked independently
* Test and Debug Logic
* Total floating point performance: 218 GFLOPS
* Capable of running at speeds beyond 4 GHz

* Synergistic Processor Elements (SPEs)
An SPE is a self contained vector processor which acts as an independent processor. They each contain 128 x 128 bit registers, there are also 4 (single precision) floating point units capable of 32 GigaFLOPS* and 4 Integer units capable of 32 GOPS (Billions of integer Operations per Second) at 4GHz. The SPEs also include a small 256 Kilobyte local store instead of a cache. According to IBM a single SPE (which is just 15 square millimetres and consumes less than 5 Watts at 4GHz) can perform as well as a top end (single core) desktop CPU given the right task.

*This is counting Multiply-Adds which count as 2 instructions, hence 4GHz x 4 x 2 = 32 GFLOPS. 32 X 8 SPEs = 256 GFLOPS

*The local store does not operate like a conventional CPU cache since it is neither transparent to software nor does it contain hardware structures that predict which data to load.

Like the PPE the SPEs are in-order processors and have no Out-Of-Order (OOO) capabilities. This means that as with the PPE the compiler is very important. The SPEs do however have 128 registers and this gives plenty of room for the compiler to unroll loops and use other techniques which largely negate the need for OOO hardware.

The PPE: Capable of running a conventional operating system, has complete control over the SPEs. It can can start, stop, interrupt, and schedule processes running on any of the the SPEs. To this end the PPE has additional instructions relating to control of the SPEs. Unlike the SPEs, the PPE can read and write to main memory, and the local memories (local stores) of each SPE through the standard load/store instructions. Despite having Turing complete architectures, the SPEs are not fully autonomous and require the PPE to prime them before they can do any useful work.

Though most of the "horsepower" of the system comes from the synergistic processing elements, the use of DMA as a method of data transfer and the limited local memory footprint of each SPE pose a major challenge to software developers who wish to make the most of this horsepower, demanding careful hand-tuning of programs to extract maximal performance from this CPU.


CPU: Emotion Engine (20 & 60GiB USA/JAP Only)

* Clock Frequency: 300 MHz
* Instruction Set: MIPS III, MIPS IV Subset, 107 Vector Instructions
* MIPS Based Core: 2 Issue, 2 64 Bit Fixed Point Units, 1 Floating Point Unit, 6 Stage Pipeline
* Instruction Cache: 16 KiB, 2 Way Set Associative
* Data Cache: 8 KiB, 2 Way Set Associative
* Scratch pad RAM: 16 KiB
* Translation Look Aside Buffer: 48 Entry Combined Instruction/Data
* Vector Processing Unit: 4 FMAC Units, 1 FDIV Unit
* Vector Processing Unit Registers Register: 128 Bit Wide, 32 Entries
* Image Processing Unit: MPEG2 Macroblock Layer Decoder
* Direct Memory Access: 10 Channels
* Internal Data Bus: 128 Bit, 150 MHz, 2 GiB/s Maximum Effective Bandwidth
* Memory Bus: Two 16 Bit, 400 MHz DRDRAM Channels, 3.2 GiB/s Maximum Theoretical Bandwidth
* Manufacturing Process: 0.25 �m (0.18 �m Effective LG, 4 Layer Metal, CMOS)
* VDD Voltage: 1.8 V
* Power Consumption: 15 W at 1.8 V
* Transistor Count: 10.5 Million
* Die Area: 240 mm�
* Chip Packaging: 540 Contact PBGA
* Floating Point: 6.2 Billion Single Precision (32 Bit) Floating Point Operations a Second
* Perspective Transformation: 66 Million Polygons a Second
* With Lighting and Fog: 36 Million Polygons a Second
* Bezier Surface Patches: 16 Million Polygons a Second
* Image Decompression: 150 Million Pixels a Second

GPU: RSX "Reality Synthesizer" @ 550MHz

* 550 MHz G70 based GPU on 90 nm process
* 300+ million transistors (600 million with Cell CPU)
* Multi-way programmable parallel floating-point shader pipelines
> Independent pixel/vertex shader architecture
> 24 parallel pixel pipelines, aligned in 6-way MIMD array
> 5 ALU operations per pipeline, per cycle (2 vector4 or 2 scalar/dual/co-issue and fog ALU)
> 27 FLOPS per pipeline, per cycle
> 8 parallel vertex pipelines, aligned in 8-way MIMD array
> 2 ALU operations per pipeline, per cycle (1 vector4 and 1 scalar, dual issue)
> 10 FLOPS per pipeline, per cycle
> Maximum vertex count:a lot probably over 1.2 billion vertices per second
> Minimum (worst case) polygon count: 400 million polygons per second (1.2 billion vertices per second / 3 vertices per triangle)
> Maximum (optimistic case) 750 million and more depending on how many triangle strips are used in the game
> Maximum shader operations:100 billion shader operations per second ( 136 shader operations per clock cycle ).
> Announced: 1.8 TFLOPS (trillion floating point operations per second) (2 TFLOPS overall performance)
* 24 texture filtering units (TF) and 8 vertex texture addressing units (TA)
> 24 filtered samples per clock
> Maximum texel fillrate: 13.2 GigaTexels per second (24 textures * 550 MHz)
> 32 unfiltered texture samples per clock, ( 8 TA x 4 texture samples )
* 8 Render Output units
> Maximum pixel fillrate: 4.4 GigaPixel per second (8 ROPs * 550 MHz)
> Maximum Z sample rate: 8.8 GigaSamples per second (2 Z-samples * 8 ROPs * 550 MHz)
> Maximum anti-aliasing sample rate: 8.8 GigaSamples per second (2 subsamples * 8 ROPs * 550 MHz)
* Maximum Dot product operations: 51 billion per second
* 128-bit pixel precision offers rendering of scenes with high dynamic range rendering (HDR)
* 256 MiB GDDR3 RAM at 700 MHz
> 128-bit memory bus width
> 22.4 GiB/s read and write bandwidth
* Cell FlexIO bus interface
> 20 GiB/s read to the Cell and XDR memory
> 15 GiB/s write to the Cell and XDR memory
* Support for OpenGL ES 2.0
* Support for S3TC texture compression


GPU: GS "Graphic Synthesizer" (20 & 60GiB USA/JAP/60GB PAL Models)

* Clocked at 147 MHz
* Pixel pipelines: 16
* Video output resolution: variable from 256x224 to 1280x1024 pixels
* 4 MB (MiB) Embedded DRAM video memory bandwidth at 48 GigaBytes per second (main system 32 MB can be dedicated into vram)
> Texture buffer bandwidth: 9.6 GBytes/s
> Frame buffer bandwidth: 38.4 GBytes/s
* DRAM Bus width: 2560-bit (composed of three independent buses: 1024-bit write, 1024-bit read, 512-bit read/write)
* Pixel Configuration: RGB: Alpha:Z Buffer (24:8, 15:1 for RGB, 16, 24, or 32-bit Z buffer)
* Dedicated connection to: Main CPU and VU1
* Overall Pixel fillrate: 16x147 = 2.352Gpixel/sec(rounded to 2.4Gpixel/sec)
* Pixel fillrate: with no texture, flat shaded 2.4(75,000,000 32pixel real-world triangles)
* Pixel fillrate: with 1 full texture(Defuse Map), Gouraud shaded 1.2 (37,750,000 32-bit pixel real-world triangles)
* Pixel fillrate: with 2 full textures(Defuse map + specular or alpha or other), Gouraud shaded 0.6 (18,750,000 32-bit pixel real-world triangles)
* Multi-pass rendering ability
> Four passes = 300M pixels/second (300M pixel/sec divided by 32pixel = 9,375,000 triangle/sec lossed every four passes)


Sound:

* Dolby 5.1ch, DTS, LPCM, etc. (Cell-based processing)


System Memory (Non Unified):

* 256MB XDR Main RAM @3.2GHz
* 256MB GDDR3 VRAM @700MHz


System Bandwidth:

* Main RAM -- 25.6GB/s
* VRAM -- 22.4GB/s
* RSX -- 20GB/s (write) + 15GB/s (read)
* SB -- 2.5GB/s (write) + 2.5GB/s (read)


System Floating Point Performance:

* 2 TFLOPS


Storage:

* Blu-Ray optical Drive
> 2X Read (72Mbps)
* Detachable 2.5" SATA-1HDD slot x 1
> 20GB
> 60GB
> 80GB
> 40GB
> Expandable
> Notebook SATA-1 5200 RPM Drive to 750GiB (750 highest known used)
* Memory Card Reader (Model Specific)

I/O

* SATA-1 HDD Controller
> 750Mhz
* USB Front x 4, Rear x 2 (USB2.0) (20, 60 & 80 GiB Models)
> 2 Front (40Gb Model)
* Memory Card Reader (60 & 80 GiB Model)
> Memory Stick standard/Duo, PRO x 1
> SD standard/mini x 1
> CompactFlash (Type I, II) x 1


Communication:

* Ethernet (10BASE-T, 100BASE-TX, 1000BASE-T)
* Wi-Fi IEEE 802.11 b/g
* Bluetooth 2.0 (+EDR)
> 2402 - 2480 Ghz
> 3.3vDC

US: FCC Regulations prohibit the simultaneous transceiving of Blue-Tooth and WLAN from a single unit. Both transceiver arrays are multiplexed on and off to transceive opposite each other by turning each array on and off many times a second.


Controller:

* Bluetooth (up to 7)
* USB 2.0 (wired)
* Wi-Fi (PSP)
* Network (over IP)


AV Output

* Screen size: 480i, 480p, 720p, 1080i, 1080p
* HDMI v1.3a out
* Analog: AV MULTI OUT x 1
> Composite
> Component
> SCART (PAL)
> S-Video
> VGA
* Digital audio: DIGITAL OUT (OPTICAL) x 1
* RCA Audio Out


Disc Media:

* CD PlayStation CD-ROM, PlayStation 2 CD-ROM, CD-DA, CD-DA (ROM), CD-R, CD-RW, SACD,
SACD Hybrid (CD layer), SACD HD, DualDisc, DualDisc (audio side), DualDisc (DVD side)
> No SACD 40GiB Model
* DVD: PlayStation 2 DVD-ROM, PlayStation 3 DVD-ROM, DVD-Video, DVD-ROM, DVD-R,
DVD-RW, DVD+R, DVD+RW
* Blu-ray Disc: PlayStation 3 BD-ROM, BD-Video, BD-ROM, BD-R, BD-RE
> Blu-Ray Java


Backward Compatibility Models PS1/PS2

* 60Gb Model - Hardware (USA/JAP Only)
* 20GB Model - Hardware (USA/JAP Only)
* 80GB Model - Software (All Regions) Prior to September 2008
* 40GB Model - Software PS1 Only

File System

* Proprietary Fat32 Derived File System (HDD)
> Encrypted Format
> Formatted HDD Only works in console formatted on
> Physical 4GB file (Fat32) size limit restriction does not apply
* Memory cards for reader - Fat32
* Linux (Other O/S)
> Ubuntu
> Fedora
> Gentoo
> Debian
> Yellow Dog


File Extensions

* .BLD = BootLoader - For Installing Other O/S
* .PUP = File or patch used to update the PlayStation 3 (PS3) system software.
* .PKG = Package - Downloaded Demos/Content In Compressed Format
* .SELF = Recognized By GameO/S For Foreign BootLoaders
> No longer required with V1.60 and up; use .BLD
* .PSV = Native Game Save File Format
> Digitally Signed

MISC
* DivX / XviD Support With v2.10 firmware
* DivX / XviD > 2GB File Support with v2.15 firmware

Known Blu-Ray Drive Laser/Models & Info:
* KEM-400AAA
> CECHG01 / CECHA01 / CECHB01 / CECHG01
* KEM 410a
> CECHK01, CECHL01 units and some of the CECHH01 & CECHG01 Units
* KEM-410aca
> CECHE01 / CECHP01 / CECHK01
* KES-400A
> CECHE01 / CECHA01
* KES-400AAA
> CECHE01 / CECHA01

-e-

One more thing...



The text is kind of hard to read but you can see that they are only physical cores and you can also see there are 9 cores.

Graphics do not matter to me. Games matter to me, and the 360 has more games for me.

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's, they dont use all of them, theres 1 core and 8 spu's, 2 of the spu's arent used so they can maintain performance, so that leaves the developer with 6, developers are just now getting good with 4 cores so good luck having the 6 that you can use on ps3, see i know about tech, its better to know then just copy and paste from the net, and why does all this matter anyways, we were talking about graphics not just the cell, so everyone go enjoy your xbox 360's graphics, by the time you can see huge differences between ps3 and xbox 360 games the next gen will be here, its not that big of a deal, 360's graphics are just fine

(o and you do know theres not only one kind of cell broadband engine)

link plz?

Grunt06 wrote:

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's

No there is no reading closer. It is not a 1 core processor. That is just plain ridiculous. Name the SPU's what you will they are still cores period.

Since facts dont matter and you people want to argue the technical documentation from the IBM website (you guys have yet prove me wrong with documentation from a legitimate source and not youtube).

360fourlife wrote:

Grunt06 wrote:

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's

No there is no reading closer. It is not a 1 core processor. That is just plain ridiculous. Name the SPU's what you will they are still cores period.

Since facts dont matter and you people want to argue the technical documentation from the IBM website (you guys have yet prove me wrong with documentation from a legitimate source and not youtube).

lol dude the spu's are vitural cores, yes you can call them cores but they arent true cores, they viturally act like cores, its like the i7 quad core cpu from intel, its a quad core but viturally it has 8 cores because of hyper threading, why would any body including IBM say the cell only has one core! When it comes to comparing it with other cpu's it really does only have one core but its like 1 core with 8 brains behind it. AND REALLY DUDE EVEN IF THINGS DID GO YOUR WAY AND IT DID HAVE 9 TRUE CORES....THEY CAN ONLY USE SIX OF THEM SO I DONT KNOW WHAT YOUR TRYING TO PROVE!!!! its a joke, sorry dude but an SPU is not a true core to anyone else besides IBM!

Here is a great video that explains how the cores work between the two systems, take a butchers and it will explain it better

https://www.youtube.com/watch?v=zmHY_VnuDdE&feature=related

The guy who is making this video also states in another video that he prefers the Xbox 360 overall.

Everything about the Cell Architecture can be found here.

Something interesting I read in a searching if the cores were virtual or not (didnt find anything saying they were) was about the 360 processor.

Quote :

The PPE was designed specifically for the Cell processor but during development, Microsoft approached IBM wanting a high performance processor core for its Xbox 360. IBM complied and made the tri-core Xenon processor, based on a slightly modified version of the PPE.

I love my 360 but its a shame I got banned from Live. Its a good thing I have 2 backup 360's lol.

360fourlife wrote:

Everything about the Cell Architecture can be found here.

Something interesting I read in a searching if the cores were virtual or not (didnt find anything saying they were) was about the 360 processor.

Quote :

The PPE was designed specifically for the Cell processor but during development, Microsoft approached IBM wanting a high performance processor core for its Xbox 360. IBM complied and made the tri-core Xenon processor, based on a slightly modified version of the PPE.

I love my 360 but its a shame I got banned from Live. Its a good thing I have 2 backup 360's lol.

yeah part of sonys IBM contract money went towards the making of the xbox 360's cpu...its kind of funny, the 360 cpu is based off of some of the same things as the cell but the cell is more powerful in its own rights

sorry i have been calling the spe's spu's sorry i guess i was thinking cpu so much lol

lightlamp2 wrote:

as proven with bayonetta

............. i have been on this forum for ten minutes and i'm already seeing why the ps3 fanboys are laughing at you. well, that was ten minutes i'll never get back...

link89 wrote:

lightlamp2 wrote:

as proven with bayonetta

............. i have been on this forum for ten minutes and i'm already seeing why the ps3 fanboys are laughing at you. well, that was ten minutes i'll never get back...

Uh

HellJumper wrote:

Umm,im pretty sure ps3 can get better graphics.Link plz?

I'm pretty sure it can't.

why is this thread still here omg

joe11 wrote:

why is this thread still here omg

i know right...

360fourlife wrote:

Grunt06 wrote:

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's

No there is no reading closer. It is not a 1 core processor. That is just plain ridiculous. Name the SPU's what you will they are still cores period.

Since facts dont matter and you people want to argue the technical documentation from the IBM website (you guys have yet prove me wrong with documentation from a legitimate source and not youtube).

A core is different from an SPU. It's like comparing dollars and Euros. A core on the 360 provides 2 hardware threads. An SPU on the PS3 provides 1 hardware thread.

The Cell is composed of 1 core and 8 SPUs. 1 or 2 is reserved for the XMB and another is not used at all. So it's actually 5 or 6 SPU's, boosting about 8 hardware threads, compared to 6 hardware threads on the Xenon cores. You got to also factor in the GPUs. The Xenos not only uses a unified shader architecture, but it also has the eDRAM to help it out with AA and framebuffers, which can essentially take a good porportion of the workload off the Xenos. Not only that, but the Xenos has a 95% effenciey, compared to 65% with the RSX. So to the developers atleast, the Xenos is more than 1.5 times powerful than the RSX.

I thought the PS3 could pump out the best graphics?

Alan1994 wrote:

360fourlife wrote:

Grunt06 wrote:

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's

No there is no reading closer. It is not a 1 core processor. That is just plain ridiculous. Name the SPU's what you will they are still cores period.

Since facts dont matter and you people want to argue the technical documentation from the IBM website (you guys have yet prove me wrong with documentation from a legitimate source and not youtube).

A core is different from an SPU. It's like comparing dollars and Euros. A core on the 360 provides 2 hardware threads. An SPU on the PS3 provides 1 hardware thread.

The Cell is composed of 1 core and 8 SPUs. 1 or 2 is reserved for the XMB and another is not used at all. So it's actually 5 or 6 SPU's, boosting about 8 hardware threads, compared to 6 hardware threads on the Xenon cores. You got to also factor in the GPUs. The Xenos not only uses a unified shader architecture, but it also has the eDRAM to help it out with AA and framebuffers, which can essentially take a good porportion of the workload off the Xenos. Not only that, but the Xenos has a 95% effenciey, compared to 65% with the RSX. So to the developers atleast, the Xenos is more than 1.5 times powerful than the RSX.

bingo thank you man

Grunt06 wrote:

Alan1994 wrote:

360fourlife wrote:

Grunt06 wrote:

@ 360fourlife

dude i know what im talking about, yes it says its 9 cores but if you read closer it has 1 core with 8 spu's

No there is no reading closer. It is not a 1 core processor. That is just plain ridiculous. Name the SPU's what you will they are still cores period.

Since facts dont matter and you people want to argue the technical documentation from the IBM website (you guys have yet prove me wrong with documentation from a legitimate source and not youtube).

A core is different from an SPU. It's like comparing dollars and Euros. A core on the 360 provides 2 hardware threads. An SPU on the PS3 provides 1 hardware thread.

The Cell is composed of 1 core and 8 SPUs. 1 or 2 is reserved for the XMB and another is not used at all. So it's actually 5 or 6 SPU's, boosting about 8 hardware threads, compared to 6 hardware threads on the Xenon cores. You got to also factor in the GPUs. The Xenos not only uses a unified shader architecture, but it also has the eDRAM to help it out with AA and framebuffers, which can essentially take a good porportion of the workload off the Xenos. Not only that, but the Xenos has a 95% effenciey, compared to 65% with the RSX. So to the developers atleast, the Xenos is more than 1.5 times powerful than the RSX.

bingo thank you man

No problem.